Evaluating the impact of communication latency on applications running over on-chip multiprocessing platforms: A layered approach
Evaluating the impact of communication latency on applications running over on-chip multiprocessing platforms: A layered approach
复制标题
评估通信延迟对片上多处理平台上运行的应用程序的影响：分层方法
DOI：
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发表时间：
2010
期刊：
影响因子：
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通讯作者：
M. Glesner
中科院分区：
文献类型：
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作者：
L. Indrusiak;Luciano Ost;F. Moraes;S. Maatta;J. Nurmi;L. Moller;M. Glesner
多处理器平台中通信延迟的评估需要对应用程序进行分析，平台的架构描述以及应用程序任务映射到处理内核上的映射。在本文中，我们描述了一种分层方法，该方法允许应用程序开发人员从应用程序功能的抽象模型中获得准确的通信延迟数字。关注点的完整分离是这种方法的关键部分，因此，这里的主要贡献是不同层之间接口的定义：抽象应用程序模型，可执行的对应物，映射启发式启发式和多处理器平台模型。具有现实应用和基于NOC的多处理器平台的案例研究显示了使用两种不同的系统评估技术的拟议方法的潜力：仿真和静态分析。
The evaluation of communication latency in multiprocessor platforms requires the profiling of the application, the description of the architecture of the platform and of the mapping of application tasks onto processing cores. In this paper, we describe a layered approach that allows application developers to obtain accurate figures for communication latency from an abstract model of the application functionality. A complete separation of concerns is a critical part of this approach, so the major contribution here is the definition of interfaces between different layers: an abstract application model, its executable counterpart, the mapping heuristic and the multiprocessor platform model. Case studies with a realistic application and a NoC-based multiprocessor platform show the potential of the proposed approach using two different system evaluation techniques: simulation and static analysis.