Design techniques of low-power embedded EEPROM for passive RFID tag
Design techniques of low-power embedded EEPROM for passive RFID tag
复制标题
无源RFID标签低功耗嵌入式EEPROM设计技术
DOI：
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发表时间：
2012
影响因子：
1.4
通讯作者：
Ying
中科院分区：
文献类型：
--
作者：
Zhaoxian Cheng;Xiao;Yu;Ying
本文提出了一种优化的嵌入式 EEPROM 设计方法，该方法显着降低了短距离无源 RFID 标签的功耗。所提出的阵列控制电路采用改进的结构来最小化存储位单元的泄漏。通过所提出的阵列电路设计，无源 RFID 标签可以在消耗低静态电流的情况下工作。带有所提出的 EEPROM 的 RFID 标签采用标准 0.35μm 四金属二多晶 CMOS 工艺制造。测量结果显示，在电源电压为3.3V时，擦除/写入电流为45μA，读取电流消耗为3μA。数据读取时间为300ns/bit。
This paper presents an optimized embedded EEPROM design approach which has reduced the power significantly in a short-range passive RFID tag. The proposed array control circuit employs an improved structure to minimize the leakage of memory bit cells. With the proposed array circuit design, the passive RFID tag can operate drawing a low quiescent current. The RFID tag with the proposed EEPROM was fabricated in a standard 0.35-μm four-metal two-poly CMOS process. Measurement results show that the erasing/writing current is 45 μA, and reading current consumption is 3 μA with a supply voltage of 3.3 V. The data read time is 300 ns/bit.