A high-gain 60GHz power amplifier with 20dBm output power in 90nm CMOS
A high-gain 60GHz power amplifier with 20dBm output power in 90nm CMOS
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DOI：
10.1109/isscc.2010.5433882
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发表时间：
2010-03
期刊：
影响因子：
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通讯作者：
C. Y. Law;A. Pham
中科院分区：
文献类型：
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作者：
C. Y. Law;A. Pham
在无线通信中，对高质量视频和音频的高要求增加了所需的传输数据速率。北美v波段未经许可的7GHz带宽引起了企业和研究机构的广泛关注。利用CMOS制造完成的研究课题，由于其高集成度，似乎是一个更有吸引力的过程，已被证明是一种可行的半导体，用于千兆无线60GHz[1]。根据美国联邦通信委员会（FCC）的规定，60GHz系统的最大辐射功率可达40dBm[2]。然而，由于器件限制，如低最大工作频率和低击穿电压，很少有使用CMOS工艺的高输出功率功率放大器（PA）设计被报道。迄今为止，该频率范围内的中至高功率放大器通常使用III-V半导体制造工艺实现。
In wireless communications, high demand for superb video and audio quality increases the required transfer data rate. The unlicensed 7GHz bandwidth at V-band in North America has been drawing a lot of attention by companies and research institutions. Research topics done using CMOS fabrication, which appears to be a more appealing process due to its high level of integration, have been demonstrated to be a viable semiconductor for gigabit wireless at 60GHz [1]. According to the Federal Communications Commission (FCC) regulations, the maximum radiation power for 60GHz systems can reach up to 40dBm [2]. However, due to device limitations such as low maximum operating frequencies and low breakdown voltage, very few power amplifier (PA) designs using CMOS processes with high output power have been reported. To date, medium- to high-power amplifiers in this frequency range are normally implemented using III–V semiconductor fabrication processes.