Brief Industry Paper: AXI-InterconnectRT: Towards a Real-Time AXI-Interconnect for System-on-Chips
Brief Industry Paper: AXI-InterconnectRT: Towards a Real-Time AXI-Interconnect for System-on-Chips
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简短的行业论文：AXI-InterconnectRT：迈向片上系统的实时 AXI 互连
DOI：
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发表时间：
2021
期刊：
影响因子：
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通讯作者：
Zheng Dong
中科院分区：
文献类型：
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作者：
Zhe Jiang;N. Audsley;Dayu Shill;Kecheng Yang;N. Fisher;Zheng Dong
在现代实时异构系统中，确保互连的可预测性变得越来越重要。现有的互连主要是为了实现高吞吐量而设计的，其微架构通常基于FIFO队列。这种基于FIFO的设计阻止了根据事务的重要性来确定事务的优先级，导致难以确保事务的可预测性，特别是在具有大量系统组件的系统中。在本文中，我们介绍了AXI-InterconnectRT，异构SoC的实时AXI互连，它重新定义了互连的微架构，使缓冲事务的随机访问和组织使用专用硬件单元的事务。通过新的微架构，AXI-InterconnectRT可以根据事务的重要性来管理事务，从而保证事务的可预测性。
In modern, real-time heterogeneous systems, ensuring the predictability of interconnects is becoming increasingly important. Existing interconnects are mainly designed to achieve high throughput, with their micro-architectures usually based on FIFO queues. This FIFO-based design prevents prioritization of transactions based on their importance, leading to difficulties in ensuring transaction predictability, especially in a system with a large number of system components. In this paper, we introduce AXI-InterconnectRT, a real-time AXI interconnect for heterogeneous SoCs, which redefines the micro-architecture of interconnects by enabling random accesses of buffered transactions and organizing transactions using dedicated hardware units. With the new micro-architecture, AXI-InterconnectRT can manage transactions based on their importance, guaranteeing their predictability.