XNOR-POP: A processing-in-memory architecture for binary Convolutional Neural Networks in Wide-IO2 DRAMs

XNOR-POP: A processing-in-memory architecture for binary Convolutional Neural Networks in Wide-IO2 DRAMs
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DOI:
10.1109/islped.2017.8009163
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发表时间:
2017-07
期刊:
2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)
影响因子:
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通讯作者:
Lei Jiang;Minje Kim;Wujie Wen;Danghui Wang
Lei Jiang;Minje Kim;Wujie Wen;Danghui Wang
中科院分区:
其他
文献类型:
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作者:
Lei Jiang;Minje Kim;Wujie Wen;Danghui Wang

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由于有限的硬件资源和低功耗预算,在移动的设备中采用计算密集型和参数丰富的卷积神经网络(CNN)具有挑战性。为了支持多个同时运行的应用,一个移动终端需要实时地同时执行多个CNN测试。先前的解决方案在以合理的硬件和功率成本服务于多个应用时不能保证足够高的帧速率。在本文中,我们提出了一种新的内存处理架构来处理Wide-IO 2 DRAM中出现的二进制CNN测试。与最先进的加速器相比,我们的设计将CNN测试性能提高了4× 1011 ×,硬件和功耗开销都很小。
It is challenging to adopt computing-intensive and parameter-rich Convolutional Neural Networks (CNNs) in mobile devices due to limited hardware resources and low power budgets. To support multiple concurrently running applications, one mobile device needs to perform multiple CNN tests simultaneously in real-time. Previous solutions cannot guarantee a high enough frame rate when serving multiple applications with reasonable hardware and power cost. In this paper, we present a novel process-in-memory architecture to process emerging binary CNN tests in Wide-IO2 DRAMs. Compared to state-of-the-art accelerators, our design improves CNN test performance by 4× ∼ 11× with small hardware and power overhead.