A Reliable PUF in a Dual Function SRAM
A Reliable PUF in a Dual Function SRAM
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DOI：
10.1109/patmos.2018.8464143
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发表时间：
2018-07
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影响因子：
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通讯作者：
Mohd Syafiq Mispan;Shengyu Duan;Basel Halak;Mark Zwolinski
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文献类型：
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作者：
Mohd Syafiq Mispan;Shengyu Duan;Basel Halak;Mark Zwolinski
SRAM物理不可克隆功能（SRAM-PUF）是用于轻量级安全密钥生成的潜在解决方案，并且特别适合于资源受限的安全设备。SRAM-PUF能够通过利用固有的制造工艺变化来基于启动值（SUV）生成随机且唯一的加密密钥。出于成本效率的考虑，系统中可用的片上SRAM可以被重用为PUF。随着CMOS技术的缩小，老化引起的负偏置温度不稳定性（NBTI）变得更加明显，从而导致存储器位单元在长时间存储相同位值之后的非对称退化。这导致SRAM-PUF的SUV不可靠。在本文中，我们调查的位概率在一个指令高速缓存和长期可靠性的影响。我们表明，在32位ARM指令缓存中的信号概率具有可预测的模式。因此，我们提出了一种位选择技术，以减轻NBTI效应时，指令缓存被用作PUF。我们表明，这种技术可以减少预测的位误差在SRAM-PUF从14.18%到5.58%，超过5年。因此，随着位错误的减少，纠错的面积开销比没有位选择技术的面积开销小约6倍。
An SRAM Physical Unclonable Function (SRAM-PUF) is a potential solution for lightweight secure key generation, and is particularly suitable for resource-constrained security devices. An SRAM-PUF is able to generate random and unique cryptographic keys based on start-up values (SUVs) by exploiting intrinsic manufacturing process variations. For cost efficiency the available on-chip SRAM in a system can be reused as a PUF. As CMOS technology scales down, ageing-induced Negative Bias Temperature Instability (NBTI) becomes more pronounced, resulting in asymmetric degradation of memory bit cells after prolonged storage of the same bit values. This causes unreliable SUVs for an SRAM-PUF. In this paper, we investigate the bit probabilities in an instruction cache and the effect on long-term reliability. We show that the signal probability in a 32-bit ARM instruction cache has a predictable pattern. Hence, we propose a bit selection technique to mitigate the NBTI effect when an instruction cache is used as a PUF. We show that this technique can reduce the predicted bit error in an SRAM-PUF from 14.18% to 5.58% over 5 years. Consequently, as the bit error reduces, the area overhead of the error-correction is about $6 \times$ smaller compared to that without a bit selection technique.