COnfigurable Network Protocol Accelerator (COPA) † : An Integrated Networking/Accelerator Hardware/Software Framework

COnfigurable Network Protocol Accelerator (COPA) † : An Integrated Networking/Accelerator Hardware/Software Framework
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COConfigurable 网络协议加速器 (COPA) †:集成网络/加速器硬件/软件框架

DOI:
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发表时间:
2020
期刊:
IEEE Symposium on High-Performance Interconnects
影响因子:
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通讯作者:
M. Blocksome
M. Blocksome
中科院分区:
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文献类型:
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作者:
V. Krishnan;O. Serres;M. Blocksome

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现代的现场可编程门阵列不仅仅是“门阵列”--它们提供硬件加速能力和高级功能,包括高带宽存储器(HBM)、高速缓存/存储器相干/IO互连(CXL/PCIe)、高速收发器和嵌入式处理器。遗憾的是,由于缺乏标准化的硬件/软件基础设施,现场可编程门阵列只能成为主机平台控制下的二等公民,而不是具有SmartNIC功能的计算/网络加速器节点。这阻碍了在各种分布式/异类平台上更广泛地部署现场可编程门阵列。英特尔的可配置网络协议加速器(COPA)解决了这一挑战,并提供了一个可定制的框架,该框架将通信与计算集成在一个FPGA平台上。该现场可编程门阵列集成了SmartNIC功能,并作为连接到网络的“自主”节点发挥作用。在本文中,我们概述了COPA体系结构及其支持的加速模式。硬件组件提供必要的联网/加速器基础设施,而COPA的软件组件从应用程序或中间件中提取底层的FPGA。该API基于开放标准网络API(OFI),该接口已针对COPA进行了扩展,将各种加速模式暴露给软件。由于缺乏针对SmartNIC的标准API,扩展的OFI也有可能达到这一目的,目前正在努力逆流而上。COPA已在Stratix10 FGA的不同变体上实现。多个COPA现场可编程门阵列可以自主连接到标准的100GigE交换网络,并能够将各种不同的FPGA混合和匹配到该网络。还支持内联和后备加速器功能。该框架已通过模拟客户端/服务器流行为的微基准测试和代理基准测试进行了验证,并在启用加速时实现了接近100Gbps的带宽。
Modern FPGAs are more than just “gate arrays” – they offer hardware acceleration capabilities and advanced features that include High Bandwidth Memory (HBM), Cache/Memory coherent/IO interconnect (CXL/PCIe), high speed transceivers, and embedded processors. Unfortunately, lack of a standardized hardware/software infrastructure has relegated FPGAs to being second-class citizens under the control of a host platform rather than being compute/network accelerator nodes with SmartNIC capabilities. This stands in the way of broader deployment of FPGAs in a wide variety of distributed/heterogenous platforms.Intel’s COnfigurable Network Protocol Accelerator (COPA) addresses this challenge and provides a customizable framework that integrates communication with computation on an FPGA platform. The FPGA incorporates SmartNIC capabilities and functions as an “autonomous” node that attaches to the network. In this paper, we provide an overview of COPA architecture and the acceleration modes that it supports. The hardware component provides the necessary networking/accelerator infrastructure while the software component of COPA abstracts the underlying FPGA from the application or middleware. The API is based on an open standard network API (OFI) that has been extended for COPA to expose the various acceleration modes to software. Given the lack of a standard API for SmartNICs, the extended OFI can also potentially serve that purpose and efforts are underway to upstream the changes.COPA has been implemented on different variants of Stratix10 FPGAs. Multiple COPA FPGAs can autonomously connect to a standard 100GigE switching network with the ability to mix-and-match FPGA variants to this network. Both inline and lookaside accelerator functions are also supported. The framework has been validated by microbenchmarks as well as proxy benchmarks that mimic the behavior of client/server flows – and achieves bandwidths close to 100Gbps when acceleration is enabled.