Concurrent Data Structures with Near-Data-Processing: an Architecture-Aware Implementation
Concurrent Data Structures with Near-Data-Processing: an Architecture-Aware Implementation
复制标题
DOI：
10.1145/3323165.3323191
复制
发表时间：
2019-06
期刊：
影响因子：
--
通讯作者：
Jiwon Choe;Amy Huang;T. Moreshet;Maurice Herlihy;R. I. Bahar
中科院分区：
文献类型：
--
作者：
Jiwon Choe;Amy Huang;T. Moreshet;Maurice Herlihy;R. I. Bahar
内存架构的最新进展引发了人们对近数据处理（NDP）作为缓解“内存墙”问题的一种方式的新兴趣。NDP架构将逻辑电路（如简单处理器）放置在靠近内存的位置。有效利用NDP架构需要重新思考数据结构及其算法。在此，我们对用于通用并发数据结构（如链表、跳表和先进先出队列）的几种具有NDP感知的算法进行了实证评估。实证分析表明，基于NDP的并发数据结构的潜在优势比早期研究中预期的要小。反过来，受对数据访问模式和底层动态随机存取存储器（DRAM）活动的初步观察的启发，我们引入了轻量级的NDP硬件修改。即使是对硬件的最小改动也显著提高了基于NDP的并发数据结构的性能和能耗，并且在许多情况下，所得到的数据结构优于最先进的并发数据结构。
Recent advances in memory architectures have provoked renewed interest in near-data-processing (NDP) as way to alleviate the "memory wall" problem. An NDP architecture places logic circuits, such as simple processors, in close proximity to memory. Effective use of NDP architectures requires rethinking data structures and their algorithms. Here, we provide an empirical evaluation of several NDP-aware algorithms for general-purpose concurrent data structures such as linked-lists, skiplists, and FIFO queues. The empirical analysis reveals that the potential benefits of NDP-based concurrent data structures are less than what had been expected in earlier studies. In turn, we introduce lightweight NDP hardware modifications, inspired by initial observations on data access patterns and underlying DRAM activity. Even the minimal changes to hardware significantly improve the performance and energy consumption of NDP-based concurrent data structures, and in many cases, the resulting data structures outperform state-of-the-art concurrent data structures.