An FPGA-based Power-saving Particle Filter Using Dynamic Reconfiguration
An FPGA-based Power-saving Particle Filter Using Dynamic Reconfiguration
复制标题
基于 FPGA 的动态重配置节能粒子滤波器
DOI：
10.1109/candarw53999.2021.00081
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发表时间：
2021
期刊：
影响因子：
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通讯作者：
Shibata Yuichiro
中科院分区：
文献类型：
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作者：
Imamura Yuta;Fukui Shota;Manabe Taito;Shibata Yuichiro
在本文中，我们讨论了一个节能的粒子滤波器，它可以动态地改变粒子的数量，最大限度地利用FPGA的动态可重构性的FPGA实现。在利用粒子滤波器的对象跟踪处理中，当目标对象容易被跟踪时，认为即使利用少量粒子也可以执行跟踪。针对这一点，我们提出了减少粒子滤波器硬件的功耗，通过改变粒子的数量在电路级与动态重新配置取决于跟踪的容易程度。作为评估的结果，发现当使用有效样本大小（ESS）作为度量来调整粒子的数量时，与粒子的固定数量的情况相比，如果不包括动态重新配置的开销，则功耗可以减少约30%。
In this paper, we discuss an FPGA implementation of a power-saving particle filter which can dynamically change the number of particles by making the best use of dynamic reconfigurability of the FPGA. In an object tracking process with a particle filter, it is considered that the tracking can be performed even with a small number of particles when the target object is easy to be tracked. Focusing on this point, we propose to reduce the power consumption of particle filter hardware by changing the number of particles at the circuit level with dynamic reconfiguration depending on the easiness of tracking. As a result of evaluation, it is found that the power consumption can be reduced by about 30% when the number of particles is adjusted using the effective sample size (ESS) as a metric, compared with the case of the fixed number of particles, if the overhead of dynamic reconfiguration is not included.