SPICE Modeling of the Scaling of Resonant Tunneling Diodes and the Effects of Sidewall Leakage
SPICE Modeling of the Scaling of Resonant Tunneling Diodes and the Effects of Sidewall Leakage
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DOI：
10.1109/ted.2012.2219867
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发表时间：
2012-10
影响因子：
3.1
通讯作者：
G. Ternent;D. Paul
中科院分区：
文献类型：
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作者：
G. Ternent;D. Paul
采用自对准工艺实现了Si/SiGe和AlGaAs/GaAs共振隧穿二极管（RTD），器件尺寸从50 μm到30 nm。使用这些设备，缩放规则的开发和纳入修改后的SPICE模型。从模型中提取了耗尽宽度和侧壁电流。结果证实，寄生的侧壁电流是负责峰谷电流比（PVCR）在小直径RTD的减少。一种新的器件布局被证明可以显着降低侧壁电流的最佳纳米级性能。这种方法证明了PVCR的改进。
Si/SiGe and AlGaAs/GaAs resonant tunneling diodes (RTDs) are realized using a self-aligned fabrication process with dimensions ranging from 50 μm down to 30 nm. Using these devices, scaling rules are developed and incorporated into a modified SPICE model. The depletion width and the sidewall current are extracted from the model. The results confirm that the parasitic sidewall current is responsible for the reduction in peak-to-valley current ratio (PVCR) in small-diameter RTDs. A new device layout is demonstrated to significantly reduce the sidewall current for optimum nanoscale performance. Improvements in the PVCRs are demonstrated by this approach.