An ahead pipelined alloyed perceptron with single cycle access time
An ahead pipelined alloyed perceptron with single cycle access time
复制标题
具有单周期访问时间的超前流水线合金感知器
DOI：
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发表时间：
2004
期刊：
影响因子：
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通讯作者：
Mircea R. Stan
中科院分区：
文献类型：
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作者：
D. Tarjan;K. Skadron;Mircea R. Stan
随着现代处理器的流水线深度、时钟频率和执行宽度的不断增加，需要更精确的动态分支预测器来充分发挥其潜力。最近对提前流水线分支预测器[11，19]和基于感知器的分支预测器[10，11]的研究已经提供了增加的准确性或有效的单周期访问时间，代价是大的硬件预算和分支预测器恢复机制中的额外复杂性。在这里，我们表明，一个流水线的感知器预测器可以构造，使它具有一个周期的有效延迟，以最小的准确性损失。然后，我们介绍了一个预先计算的本地感知器的概念，它允许使用本地和全局的历史在一个提前流水线感知器。这两种技术一起允许这种新的感知器预测器匹配或超过以前的设计的准确性，除了在非常小的硬件预算，并允许消除与覆盖预测器相关联的其余流水线中的大部分复杂性。
The increasing pipeline depth, aggressive clock rates and execution width of modern processors require ever more accurate dynamic branch predictors to fully exploit their potential. Recent research on ahead pipelined branch predictors [11, 19] and branch predictors based on perceptrons [10, 11] have offered either increased accuracy or effective single cycle access times, at the cost of large hardware budgets and additional complexity in the branch predictor recovery mechanism. Here we show that a pipelined perceptron predictor can be constructed so that it has an effective latency of one cycle with a minimal loss of accuracy. We then introduce the concept of a precomputed local perceptron, which allows the use of both local and global history in an ahead pipelined perceptron. Both of these two techniques together allow this new perceptron predictor to match or exceed the accuracy of previous designs except at very small hardware budgets, and allow the elimination of most of the complexity in the rest of the pipeline associated with overriding predictors.