Improving Energy Efficiency by Memoizing Data Access Information
Improving Energy Efficiency by Memoizing Data Access Information
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DOI：
10.1109/islped.2019.8824951
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发表时间：
2019-07
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影响因子：
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通讯作者：
Michael Stokes;Ryan Baird;Zhaoxiang Jin;D. Whalley;Soner Önder
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文献类型：
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作者：
Michael Stokes;Ryan Baird;Zhaoxiang Jin;D. Whalley;Soner Önder
一级数据缓存（L1 DC）和数据转换暂置缓冲区（DTLB）访问会影响能源使用，因为它们经常发生，而且每次L1 DC和DTLB访问使用的能源要比寄存器文件访问多得多。通常，多个内存操作将使用相同的寄存器引用相同的缓存行，例如在遍历数组时。我们建议通过将L1 DC数据阵列方式和DTLB方式与用于访问它的寄存器相关联来记忆L1 DC访问信息，例如L1 DC数据阵列方式和DTLB方式。当加载或存储程序计算内存地址时，我们检测计算出的地址是否与基寄存器共享缓存行。如果是这样，我们避免L1 DC标签阵列访问和DTLB访问来确定L1 DC方式，而是使用记忆信息。此外，当L1 DC方式已被记忆时，在加载指令期间只需要访问集合关联的L1 DC中的单个数据数组方式。我们的非推测性记忆方法可以在推测性方法之前应用，从而在不修改ISA的情况下显著减少现有可执行文件的数据访问能耗。
Level-one data cache (L1 DC) and data translation lookaside buffer (DTLB) accesses impact energy usage as they frequently occur and each L1 DC and DTLB access uses significantly more energy than a register file access. Often, multiple memory operations will reference the same cache line using the same register, such as when iterating through an array. We propose to memoize L1 DC access information, such as the L1 DC data array way and the DTLB way, by associating this information with the register used to access it. When a load or store calculates the memory address, we detect whether the calculated address shares the cache line memoized with the base register. If so, we avoid the L1 DC tag array access and the DTLB access to determine the L1 DC way and instead use the memoized information. In addition, only a single data array way in a set-associative L1 DC needs to be accessed during a load instruction when the L1 DC way has been memoized. Our nonspeculative memoization approach can be applied before a speculative approach, allowing a significant reduction in data access energy usage for existing executables with no ISA modifications.