Secure FPGA circuits using controlled placement and routing
Secure FPGA circuits using controlled placement and routing
复制标题
使用受控布局和布线保护 FPGA 电路
DOI：
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发表时间：
2007
期刊：
影响因子：
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通讯作者：
P. Schaumont
中科院分区：
文献类型：
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作者：
Pengyuan Yu;P. Schaumont
在当前的FPGA （Field-Programmable-Logic Architecture）设计流程中，子模块的路由控制非常困难。因此，在相同的FPGA结构中制作现有电路的相同副本非常困难。我们已经解决了这个问题，我们仍然可以修改复制子模块的逻辑功能。该技术在FPGA抗侧信道实现的设计中具有重要的应用价值。从现有的单端设计开始，我们能够创建一个互补电路。由此产生的整个电路大大减少了与功耗相关的信息泄漏。我们表明，在FPGA中直接映射安全ASIC电路风格并不能保持相同的安全级别，除非采用我们的对称路由技术。我们在加密设计的FPGA原型上演示了我们的方法，并通过功率测量和侧信道功率分析表明，用我们的方法实现的安全逻辑是抵抗的，而非路由感知的直接映射电路可以成功攻击。
In current Field-Programmable-Logic Architecture (FPGA) design flows, it is very hard to control the routing of submodules. It is thus very hard to make an identical copy of an existing circuit within the same FPGA fabric. We have solved this problem in a way that still enables us to modify the logic function of the copied sub-module. Our technique has important applications in the design of side-channel resistant implementations in FPGA. Starting from an existing single-ended design, we are able to create a complementary circuit. The resulting overall circuit strongly reduces the power-consumption-dependent information leaks. We show that the direct mapping of a secure ASIC circuit-style in an FPGA does not preserve the same level of security, unless our symmetrical routing technique is employed. We demonstrate our approach on an FPGA prototype of a cryptographic design, and show through power-measurements followed by side-channel power analysis that secure logic implemented with our approach is resistant whereas non-routing-aware directly mapped circuits can be successfully attacked.