High speed target tracking vision chip

High speed target tracking vision chip
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DOI:
10.1109/camp.2000.875958
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发表时间:
2000-09
期刊:
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception
影响因子:
--
通讯作者:
T. Komuro;I. Ishii;M. Ishikawa;A. Yoshida
T. Komuro;I. Ishii;M. Ishikawa;A. Yoshida
中科院分区:
其他
文献类型:
--
作者:
T. Komuro;I. Ishii;M. Ishikawa;A. Yoshida

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介绍了一种用于高速目标跟踪的新型视觉芯片结构。利用高速视觉的特性,通过硬件实现一种特殊的算法,提高了系统的速度和像素大小。使用异步和位串行传播的方法,在高速和小电路计算的图像的全局矩。基于这种新的结构,已经研制出64/spl次/64像素的原型芯片。
This paper describes a new vision chip architecture for high speed target tracking. The system speed and pixel size improved by hardware implementation of a special algorithm which utilizes a property of high speed vision. Using an asynchronous and bit-serial propagation method, global moments of the image are calculated at high speed and with small circuits. Based on the new architecture a 64/spl times/64 pixel prototype chip has been developed.