Improved Power Modeling of DDR SDRAMs
Improved Power Modeling of DDR SDRAMs
复制标题
改进的 DDR SDRAM 功率建模
DOI：
10.1109/dsd.2011.17
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发表时间：
2011
期刊：
影响因子：
--
通讯作者：
K. Goossens
中科院分区：
文献类型：
--
作者：
K. Chandrasekar;B. Akesson;K. Goossens
功耗建模和估计已经成为现代嵌入式系统设计中最重要的方面之一。在这种情况下，DDR SDRAM存储器对系统功耗有很大贡献，但缺乏准确和通用的功耗模型。Micron提供的最流行的SDRAM功率模型被发现不准确或不足，原因有几个。首先，它没有考虑转换到掉电和自刷新模式时的功耗。其次，它采用来自SDRAM指令表的命令之间的最小定时约束，而不是SDRAM存储器控制器发出的命令之间的实际持续时间。最后，在没有适配的情况下，它只能应用于采用关闭页面策略并且一次访问单个SDRAM组的存储器控制器。Micron功率模型的这些关键问题会影响其报告的功率值的准确性和有效性，解决这些问题是我们工作的重点。在本文中，我们提出了一种改进的SDRAM功耗模型，估计功耗的状态转换到省电状态，采用SDRAM命令跟踪，以获得发出的命令之间的实际时序，是通用的，适用于所有DDRx SDRAM和所有内存控制器的政策和所有程度的银行交错。我们定量地比较了所提出的模型与未修改的Micron模型对DDR3-800的功率和能量的影响。我们显示的差异高达60%的节能预充电掉电模式的掉电持续时间为14个周期和高达80%的自刷新模式的自刷新持续时间为560个周期。
Power modeling and estimation has become one of the most defining aspects in designing modern embedded systems. In this context, DDR SDRAM memories contribute significantly to system power consumption, but lack accurate and generic power models. The most popular SDRAM power model provided by Micron, is found to be inaccurate or insufficient for several reasons. First, it does not consider the power consumed when transitioning to power-down and self-refresh modes. Second, it employs the minimal timing constraints between commands from the SDRAM datasheets and not the actual duration between the commands as issued by an SDRAM memory controller. Finally, without adaptations, it can only be applied to a memory controller that employs a close-page policy and accesses a single SDRAM bank at a time. These critical issues with Micron's power model impact the accuracy and the validity of the power values reported by it and resolving them, forms the focus of our work. In this paper, we propose an improved SDRAM power model that estimates power consumption during the state transitions to power-saving states, employs an SDRAM command trace to get the actual timings between the commands issued and is generic and applicable to all DDRx SDRAMs and all memory controller policies and all degrees of bank interleaving. We quantitatively compare the proposed model against the unmodified Micron model on power and energy for DDR3-800. We show differences of up to 60% in energy-savings for the precharge power-down mode for a power-down duration of 14 cycles and up to 80% for the self-refresh mode for a self-refresh duration of 560 cycles.