Logarithmic Conversion CMOS Image Sensor with FPN Cancellation and Integration Circuits

Logarithmic Conversion CMOS Image Sensor with FPN Cancellation and Integration Circuits
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具有 FPN 消除和积分电路的对数转换 CMOS 图像传感器

DOI：
10.3169/itej.57.1013
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发表时间：
2003
期刊：
The Journal of The Institute of Image Information and Television Engineers
影响因子：
--
通讯作者：
Yoshihiro Tanaka
Yoshihiro Tanaka
中科院分区：
--
文献类型：
--
作者：
Tomokazu Kakumoto;S. Yano;M. Kusuda;K. Kamon;Yoshihiro Tanaka

文献摘要

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A new CMOS image sensor featuring logarithmic conversion is described. The sensor has 654 (H)•~ 494(V) pixels, and the cell size is 8ƒÊm (H)•~8ƒÊm (V). We previously developed logarithmic conversion CMOS image sensors with either an FPN cancellation circuit or an integration circuit. This one has both. The sensor shows clear images without FPN and without flicker noise in brightness fluctuation. Furthermore, the afterimage level was reduced by a new pixel driving method. キーワー ド:対 数変換,FPNキ ャンセル,積 分,残 像低減,CMOS