FPGA implementation of neural network accelerator for pulse information extraction in high energy physics

FPGA implementation of neural network accelerator for pulse information extraction in high energy physics
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高能物理脉冲信息提取神经网络加速器的FPGA实现

DOI:
10.1007/s41365-020-00756-z
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发表时间:
2020-04
影响因子:
2.8
通讯作者:
Yang Yuan-Kang
Yang Yuan-Kang
中科院分区:
物理与天体物理2区
文献类型:
--
作者:
Chen Jun-Ling;Ai Peng-Cheng;Wang Dong;Wang Hui;Fang Ni;Xu De-Li;Gong Qi;Yang Yuan-Kang

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从整形脉冲中提取幅度和时间信息是核物理实验中的重要一步。为此,神经网络可以作为离线数据处理的替代方案。为了实时处理数据并减少触发事件所需的离线数据存储,我们在现场可编程门阵列平台上设计了定制的神经网络加速器,以实现卷积神经网络中的特定层。后者随后用于检测器的前端电子器件。借助完全可重新配置的硬件,经过测试的神经网络结构可用于前端电子设备中常见的整形脉冲的精确定时。该设计可以同时处理多达四个通道的脉冲信号。在工作频率为 25 MHz 时,每个通道的峰值性能为每秒 1.665 Giga 操作。
Extracting the amplitude and time information from the shaped pulse is an important step in nuclear physics experiments. For this purpose, a neural network can be an alternative in off-line data processing. For processing the data in real time and reducing the off-line data storage required in a trigger event, we designed a customized neural network accelerator on a field programmable gate array platform to implement specific layers in a convolutional neural network. The latter is then used in the front-end electronics of the detector. With fully reconfigurable hardware, a tested neural network structure was used for accurate timing of shaped pulses common in front-end electronics. This design can handle up to four channels of pulse signals at once. The peak performance of each channel is 1.665 Giga operations per second at a working frequency of 25 MHz.
DOI: 10.1002/cta.4490200512
发表时间: 1992-09
期刊: Int. J. Circuit Theory Appl.
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