Investigation of multi-level-cell and SET operations on super-lattice phase change memories
Investigation of multi-level-cell and SET operations on super-lattice phase change memories
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DOI：
10.7567/jjap.53.04ed02
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发表时间：
2014-04-01
影响因子：
1.5
通讯作者：
Takeuchi, Ken
中科院分区：
文献类型：
--
作者：
Egami, Toru;Johguchi, Koh;Takeuchi, Ken
本文通过对超晶格相变存储器（SL-PCM）的SET电流延迟和多级单元（MLC）操作的研究，给出了最佳SET脉冲。研究表明，电压或电场触发了SL-PCM的相变。感应能量对于改变电阻状态也是必不可少的。本文还用双脉冲、一步置位脉冲和两步置位脉冲验证了MLC的工作。测试结果表明，两步SET脉冲最适合MLC功能，实现了精确的电阻控制。此外，还测量了保持时间，以评估MLC SL-PCM的可靠性。SL-PCM不仅具有小的复位/置位电流，而且具有MLC操作的特点，为下一代非易失性存储器提供了一种潜在的技术。(C)2014日本应用物理学会
This paper gives the optimum SET pulse with the investigation on SET current delay and the multi-level-cell (MLC) operation for super-lattice phase change memories (SL-PCMs). From the investigation, the voltage, or the electric field triggers RESET/SET transition of SL-PCM. The induced energy is also essential for changing the resistance state. In this paper, the MLC operation is also verified with RESET pulse, 1-step SET pulse and 2-step SET pulse. The measurement results indicate the 2-step SET pulse is the best for the MLC function, which realizes the precise resistance controlling. Additionally, the retention-time is measured to evaluate the reliability of MLC SL-PCM. The features of SL-PCM are not only small RESET/SET current, but also MLC operation and the SL-PCM technology provides a potential for next generation non-volatile memories. (C) 2014 The Japan Society of Applied Physics