A Low-Power Wideband Transmitter Front-End Chip for 80 GHz FMCW Radar Systems With Integrated 23 GHz Downconverter VCO
A Low-Power Wideband Transmitter Front-End Chip for 80 GHz FMCW Radar Systems With Integrated 23 GHz Downconverter VCO
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适用于具有集成 23 GHz 下变频器 VCO 的 80 GHz FMCW 雷达系统的低功耗宽带发射机前端芯片
DOI：
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发表时间：
2012
影响因子：
5.4
通讯作者：
H. Rein
中科院分区：
文献类型：
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作者：
N. Pohl;T. Klein;K. Aufinger;H. Rein
提出了一种低功耗 FMCW 80 GHz 雷达发射机前端芯片，该芯片采用 SiGe 双极生产技术（fT=180 GHz，fmax=250 GHz）制造。除了基本的 80 GHz VCO 之外，还集成了 4:1 分频器（高达 100 GHz）、具有 -112 dBc/Hz（1 MHz 偏移）低相位噪声的 23 GHz 本地振荡器 (VCO)、PLL 混频器和静态分频器以及多个输出缓冲器。该芯片专为低功耗而设计（总共 < 0.5 W，即 5 V 电源电压下为 100 mA），由于在 68 GHz 至 92.5 GHz (Δf = 24.5 GHz) 的总宽调谐范围内需要高输出功率 (≈ 12 dBm) 和低相位噪声（1 MHz 偏移时最小 -97 dBc/Hz），因此该芯片以 80 GHz VCO 为主。双 PLL 系统在 80 GHz 下的测量结果表明，在 10 kHz 偏移频率下，相位噪声为 -88 dBc/Hz。
A low-power FMCW 80 GHz radar transmitter front-end chip is presented, which was fabricated in a SiGe bipolar production technology ( fT=180 GHz, fmax=250 GHz ). Additionally to the fundamental 80 GHz VCO, a 4:1-frequency divider (up to 100 GHz), a 23 GHz local oscillator (VCO) with a low phase noise of -112 dBc/Hz (1 MHz offset), a PLL-mixer and a static frequency divider is integrated together with several output buffers. This chip was designed for low power consumption (in total <; 0.5 W, i.e., 100 mA at 5 V supply voltage), which is dominated by the 80 GHz VCO due to the demands for high output power (≈ 12 dBm) and low phase noise (minimum -97 dBc/Hz at 1 MHz offset) within the total wide tuning range from 68 GHz to 92.5 GHz (Δf = 24.5 GHz). Measurements of the double-PLL system at 80 GHz showed a low phase noise of -88 dBc/Hz at 10 kHz offset frequency.