Scaling beyond packet switch limits with multiple dataplanes
Scaling beyond packet switch limits with multiple dataplanes
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DOI:
10.1145/3555050.3569141
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发表时间:
2022-11
期刊:
影响因子:
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通讯作者:
Yibo Guo;W. M. Mellette;A. Snoeren;G. Porter
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文献类型:
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作者:
Yibo Guo;W. M. Mellette;A. Snoeren;G. Porter
Scale-out datacenter network fabrics enable network operators to translate improved link and switch speeds directly into end-host throughput. Unfortunately, limits in the underlying CMOS packet switch chip manufacturing roadmap mean that NICs, links, and switches are not getting faster fast enough to meet demand. As a result, operators have introduced alternative, parallel fabric designs in the core of the network that deliver N-times the bandwidth by simply forwarding traffic over any of N parallel network fabrics. In this work, we consider extending this parallel network idea all the way to the end host. Our initial impressions found that direct application of existing path selection and forwarding techniques resulted in poor performance. Instead, we show that appropriate path selection and forwarding protocols can not only improve the performance of existing, homogeneous parallel fabrics, but enable the development of heterogeneous parallel network fabrics that can deliver even higher bandwidth, lower latency, and improved resiliency than traditional designs constructed from the same constituent components.