FreePDK15: An Open-Source Predictive Process Design Kit for 15nm FinFET Technology
FreePDK15: An Open-Source Predictive Process Design Kit for 15nm FinFET Technology
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FreePDK15：适用于 15nm FinFET 技术的开源预测工艺设计套件
DOI：
10.1145/2717764.2717782
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发表时间：
2015
期刊：
影响因子：
--
通讯作者：
W. R. Davis
中科院分区：
文献类型：
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作者：
Kirti Bhanushali;W. R. Davis
本文讨论了多栅15 nm FinFET器件的开源预测工艺设计工具包（PDK）的设计规则和布局指南。考虑到工艺的可变性，以及20 nm以上制造所涉及的挑战，引入了额外的设计规则。特别是，双图案光刻假设和一套独特的设计规则的关键尺寸开发。为了提高FinFET的布局密度，中间线局部互连层被实施用于FinFET布局。通过对逆变器和NAND4单元的Virtuoso布局运行Calibre设计规则检查，进一步验证规则。作为确认过程的一部分，将FreePDK 15反相器的面积与45 nm体MOS工艺中反相器的面积进行了比较，发现比例为1：6。该套件主要旨在支持将亚20纳米FinFET器件引入研究和大学。
This paper discusses design rules and layout guidelines for an open source predictive process design kit (PDK) for multi-gate 15nm FinFET devices. Additional design rules are introduced considering process variability, and challenges involved in fabrication beyond 20nm. Particularly, double patterning lithography is assumed and a unique set of design rules are developed for critical dimensions. In order to improve the FinFET layout density, Middle-of-line local interconnect layers are implemented for the FinFET layout. The rules are further validated by running Calibre design-rule checks on Virtuoso layout of an Inverter and NAND4 cells. As part of the validation process, the area of a FreePDK15 inverter was compared to the area of an inverter in 45nm bulk MOS process and the ratio was found to be 1:6. This kit primarily aims to support introduction of sub-20nm FinFET devices into research and universities.