Top down structured parallelisation of embedded image processing applications
Top down structured parallelisation of embedded image processing applications
复制标题
嵌入式图像处理应用的自顶向下结构化并行化
DOI：
10.1049/ip-vis:19941556
复制
发表时间：
1994
期刊：
影响因子：
--
通讯作者：
A. Çuhadar
中科院分区：
文献类型：
--
作者：
A. Downton;R. Tregidgo;A. Çuhadar
作者提出了一种通用的系统设计方法，旨在支持并行化的完整的图像处理应用程序使用MIMD处理器。该方法是基于一个通用的系统级并行处理器架构，“流水线处理器农场”（PPF）的利用，并适用于任何嵌入式应用程序的连续输入/输出。该设计方法说明使用计算机视觉和图像编码领域的应用程序。该设计模型可容纳几种常用的并行处理范例，方便地映射到大多数图像处理算法的软件结构，提供增量可扩展的性能，并使上限加速比可以很容易地估计从分析数据所产生的原始顺序实现的应用程序。据信，该方法在并行嵌入式系统设计中，在开发环境中，并在计算密集型图像编码算法的仿真工作中具有重要的应用。
The authors present a general system design method which is intended to support parallelisation of complete image processing applications using MIMD processors. The approach is based upon the utilisation of a generic system level parallel processor architecture, the 'pipeline processor farm'(PPF), and is applicable to any embedded application with continuous input/output. The design method is illustrated using applications from the fields of computer vision and image coding. The design model accommodates several commonly exploited parallel processing paradigms, maps conveniently to the software structure of most image processing algorithms, provides incrementally scalable performance, and enables upper-bound speedups to be easily estimated from profiling data generated by the original sequential implementation of the application. It is believed that the approach has significant application in parallel embedded systems design, in the development environment, and in simulation work for computationally intensive image coding algorithms.