Plasmonic isolator for photonic integrated circuits
Plasmonic isolator for photonic integrated circuits
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DOI：
10.1557/mrs.2018.123
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发表时间：
2018-06-01
期刊：
影响因子：
5
通讯作者：
Zayets, Vadym
中科院分区：
文献类型：
--
作者：
Shimizu, Hiromasa;Zayets, Vadym
本文讨论了在硅衬底上集成等离子体隔离器和在InP衬底上集成混合隔离器的最新研究进展。综述了等离子体隔离器的主要特性，并对其发展前景进行了展望。为了实现所提出的等离子体隔离器的设计方案，提出了一种提高表面等离子体激元的磁光品质因数(FOM)和降低传输损耗的方法。实验结果表明，优化后的铁磁等离子体结构的FOM提高了100%，传输损耗降低了20倍。
This article discusses recent studies of on-chip integration of a plasmonic isolator on a Si substrate and a hybrid isolator on an InP substrate. The key characteristics of the plasmonic isolator are reviewed and future prospects are discussed. A method to enhance the magneto-optical figure of merit (FOM) and reduce the propagation loss of a surface plasmon in order to realize the proposed design of the plasmonic isolator is described. One hundred percent enhancement of the FOM and 20x reduction of propagation loss in the optimized ferromagnetic plasmonic structure are experimentally demonstrated.