Wanted: Floating-Point Add Round-off Error instruction
Wanted: Floating-Point Add Round-off Error instruction
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需要：浮点加舍入误差指令
DOI：
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发表时间：
2016
期刊：
影响因子：
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通讯作者：
E. J. Riedy
中科院分区：
文献类型：
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作者：
Marat Dukhan;R. Vuduc;E. J. Riedy
我们提出了一个新的指令（FPDADDRE），计算圆O的错误在浮点加法。我们解释了如何在双精度不足够的应用程序中使用此指令进行高精度算术运算。在Intel Haswell、Intel Skylake和AMD Steamroller处理器以及Intel Knights Corner协处理器上的性能评估表明，这样的指令可以将双倍加法的延迟提高高达55%，并将双倍加法的吞吐量提高高达103%，而双倍乘法的收益较小，但不可忽略。新指令在使用高精度浮点运算的三个基准测试中提供了高达2倍的加速：双-双矩阵-矩阵乘法、补偿点积和通过补偿Horner方案进行的多项式求值。
We propose a new instruction (FPADDRE) that computes the round-o error in oating-point addition. We explain how this instruction benets high-precision arithmetic operations in applications where double precision is not sucient. Performance estimates on Intel Haswell, Intel Skylake, and AMD Steamroller processors, as well as Intel Knights Corner co-processor, demonstrate that such an instruction would improve the latency of double-double addition by up to 55% and increase double-double addition throughput by up to 103%, with smaller, but non-negligible benets for doubledouble multiplication. The new instruction delivers up to 2 speedups on three benchmarks that use high-precision oating-point arithmetic: double-double matrix-matrix multiplication, compensated dot product, and polynomial evaluation via the compensated Horner scheme.