HBM Connect: High-Performance HLS Interconnect for FPGA HBM.

HBM Connect: High-Performance HLS Interconnect for FPGA HBM.
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HBM连接:适用于FPGA HBM的高性能HLS互联。

DOI:
10.1145/3431920.3439301
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发表时间:
2021-03
期刊:
FPGA. ACM International Symposium on Field-Programmable Gate Arrays
影响因子:
--
通讯作者:
Cong J
Cong J
中科院分区:
其他
文献类型:
--
作者:
Choi YK;Chi Y;Qiao W;Samardzic N;Cong J

文献摘要

被引文献

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随着最近发布的基于高带宽存储器(HBM)的FPGA板,开发人员现在可以利用前所未有的外部存储器带宽。这使得更多内存受限的应用能够从FPGA加速中受益。然而,充分利用可用带宽可能不是一件容易的任务。如果一个应用需要多个处理单元来访问多个HBM通道,我们观察到有效带宽的显著下降。现有的高级综合(HLS)编程环境在产生有效的通信结构方面存在局限性。为了解决这个问题,我们提出了HBM Connect,一个高性能定制的FPGA HBM板互连。新的基于HLS-based优化技术被引入,以增加AXI总线主控器和交换元件的吞吐量。我们还提出了一个高性能的定制交叉开关,可以取代内置的交叉开关。HBM Connect的有效性在Xilinx的Alveo U280 HBM板上得到了验证。基于桶排序和归并排序的案例研究,我们探索了几个设计空间,并找到了最佳的资源性能权衡的设计点。结果表明,HBM Connect将资源性能指标提高了6.5X-211 X。
With the recent release of High Bandwidth Memory (HBM) based FPGA boards, developers can now exploit unprecedented external memory bandwidth. This allows more memory-bounded applications to benefit from FPGA acceleration. However, fully utilizing the available bandwidth may not be an easy task. If an application requires multiple processing elements to access multiple HBM channels, we observed a significant drop in the effective bandwidth. The existing high-level synthesis (HLS) programming environment had limitation in producing an efficient communication architecture. In order to solve this problem, we propose HBM Connect, a high-performance customized interconnect for FPGA HBM board. Novel HLS-based optimization techniques are introduced to increase the throughput of AXI bus masters and switching elements. We also present a high-performance customized crossbar that may replace the built-in crossbar. The effectiveness of HBM Connect is demonstrated using Xilinx’s Alveo U280 HBM board. Based on bucket sort and merge sort case studies, we explore several design spaces and find the design point with the best resource-performance trade-off. The result shows that HBM Connect improves the resource-performance metrics by 6.5X–211X.