Exploring the impact of functional test programs re-used for power-aware testing
Exploring the impact of functional test programs re-used for power-aware testing
复制标题
探索重新用于功耗感知测试的功能测试程序的影响
DOI:
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发表时间:
2015
期刊:
影响因子:
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通讯作者:
M. Reorda
中科院分区:
文献类型:
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作者:
A. Touati;A. Bosio;L. Dilillo;P. Girard;A. Virazel;P. Bernardi;M. Reorda
High power consumption during at-speed delay fault testing may lead to yield loss and premature aging. On the other hand, reducing too much test power might lead to test escape and reliability problems. Thus, to avoid these issues, test power has to map the power consumed during functional mode. Existing works target the generation of functional test programs able to maximize the power consumption in functional mode of microprocessor cores. The obtained power consumption will be used as threshold to tune the power consumed during testing. This paper investigates the impact of re-using such functional test programs for testing purposes. We propose to apply them by exploiting existing DfT architecture to maximize the delay fault coverage. Then, we combine them with the classical at-speed LOC and LOS delay fault testing schemes to further increase the fault coverage. Results show that it is possible to achieve a global test solution able to maximize the delay fault coverage while respecting the functional power budget.