Formal verification at higher levels of abstraction
Formal verification at higher levels of abstraction
复制标题
更高抽象级别的形式验证
DOI:
10.1109/iccad.2007.4397326
复制
发表时间:
2007
期刊:
影响因子:
--
通讯作者:
S. Seshia
中科院分区:
文献类型:
--
作者:
D. Kroening;S. Seshia
Most formal verification tools on the market convert a high-level register transfer level (RTL) design into a bit-level model. Algorithms that operate at the bit-level are unable to exploit the structure provided by the higher abstraction levels, and thus, are less scalable. This tutorial surveys recent advances in formal verification using high-level models. We present word-level verification with predicate abstraction and satisfiability modulo theories (SMT) solvers. We then describe techniques for term-level modeling and ways to combine word-level and term-level approaches for scalable verification.