A comparison of three representative hardware sorting units
A comparison of three representative hardware sorting units
复制标题
三种代表性硬件分拣单元的比较
DOI:
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发表时间:
2009
期刊:
影响因子:
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通讯作者:
João M. P. Cardoso
中科院分区:
文献类型:
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作者:
Rui Marcelino;Horácio C. Neto;João M. P. Cardoso
Sorting is an important operation for many embedded computing systems. Since sorting large datasets may slowdown the overall execution, schemes to speedup sorting operations are needed. Bearing in mind the hardware acceleration of sorting, we show in this paper an analysis and comparison among three hardware sorting units: sorting network, insertion sorting, and FIFO-based merge sorting. We focus on embedded computing systems implemented with FPGAs, which give us the flexibility to accommodate customized hardware sorting units. We also present a hardware/software solution for sorting data sets with size larger than the size of the sorting unit. This hardware/software solution achieves 20× overall speedup over a pure software implementation of the well-known quicksort algorithm.