An Efficient Time-based Stochastic Computing Circuitry Employing Neuron-MOS

An Efficient Time-based Stochastic Computing Circuitry Employing Neuron-MOS
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采用 Neuron-MOS 的高效基于时间的随机计算电路

DOI:
10.1145/3299874.3317985
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发表时间:
2019
期刊:
GLSVLSI2019
影响因子:
--
通讯作者:
Nakashima Yasuhiko
Nakashima Yasuhiko
中科院分区:
--
文献类型:
--
作者:
Erlina Tati;Chen Yan;Zhang Renyuan;Nakashima Yasuhiko

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设计了一种紧凑、低功耗的时基随机计算电路。在TBSC理论中,随机数用周期信号的占空比来表示。此外,SN的乘法和加法运算要求信号是非谐波的,并且在频率上不相关。为了实现频率的动态调谐,在具有神经元-MOS机制的三级逆变器链式振荡器中采用了电流匮乏结构。通过将脉冲馈入具有可调开关阈值的神经元MOS逆变器,可以产生代表任意特定SN的任意占空比,准确率为96%。通过这种方式,避免了在传统的TBSC电路中使用复杂的频率可编程振荡器和比较器,从而降低了随机数发生器(SNG)的实现成本。从电路仿真结果来看,所提出的TBC电路可以恢复乘法和加法运算,准确率约为97%。整个电路使用了210个CMOS晶体管,一次运算的功耗为2.5pJ,分别是传统TBCS电路的14%和36.7%。
A compact and low energy circuitry of time-based stochastic computing (TBSC) have been designed. In the TBSC theory, stochastic numbers (SNs) are represented by duty-cycle of periodic signals. Additionally, multiplication and addition operations of the SNs require the signals to be in-harmonic and uncorrelated in frequency. In order to dynamically tune the frequency, a current-starved structure is applied in a three-stage inverter chain type of oscillator with the neuron-MOS mechanism. By feeding the pulses to a neuron-MOS based inverter with adjustable switching threshold, arbitrary duty-cycle for representing any specific SNs can be generated with the accuracy of 96%. In this manner, the implementation cost of the stochastic number generator (SNG) is reduced by avoiding the use of complex frequency-programmable-oscillator and comparator which are exploited in the conventional TBSC circuit. From circuit simulation results, multiplication and addition operations can be retrieved by proposed TBCS circuits with the accuracy of about 97%. The entire circuitry utilizes 210 CMOS transistors, and consumes the energy of 2.5pJ for one computation, which is 14% and 36.7% of conventional TBCS circuit, respectively.
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