A Novel Feature Extraction Strategy for Hardware Trojan Detection
A Novel Feature Extraction Strategy for Hardware Trojan Detection
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DOI：
10.1109/iscas45731.2020.9180479
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发表时间：
2020-09
期刊：
影响因子：
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通讯作者：
Shichao Yu;Chongyan Gu;Weiqiang Liu;Máire O’Neill
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文献类型：
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作者：
Shichao Yu;Chongyan Gu;Weiqiang Liu;Máire O’Neill
硬件木马（HT）被认为是一个重要的新兴的安全问题，在IC行业所造成的半导体供应链的全球化。最近，利用计算能力的指数增长，机器学习（ML）方法，如神经网络（NN）正在考虑用于HT检测。然而，IC设计的电路结构和组件与ML模型中的数据类型不同。从复杂的IC设计中有效地提取HT特征并利用常见的基于ML的检测方法具有挑战性。本文提出了一种新的基于门级电路网表的HT特征提取策略。HT特征是从电路拓扑结构中提取的，而不是以前的研究中的统计分析。采用一种常用的基于支持向量机（SVM）的超线程检测模型，在开源库和超线程生成平台的超线程基准测试程序上对提取的特征进行数据训练和测试，证明了所提出的超线程特征提取策略的可行性和有效性。检测结果显示，在几乎所有测试的基准测试高召回，达到最高97.7%的召回序列木马和84.8%的组合。
Hardware Trojans (HTs) are acknowledged as a significant emerging security concern in the IC industry resulting from the globalization of the semiconductor supply chain. Recently, taking advantage of the exponential growth in computing power, machine learning (ML) approaches such as neural networks (NNs) are being considered for HT detection. However, the circuit structure and components of an IC design are different from the data types in the ML models. To efficiently extract HT features from complex IC designs and utilize common ML-based detection approaches is challenging. In this paper, a novel HT feature extraction strategy based on gate-level circuit netlists is proposed to tackle the challenges. The HT features are extracted from the circuit topology rather than statistical analysis in previous research. A commonly utilized support vector machine (SVM)-based HT detection model is employed for data training and testing using the extracted features on HT benchmarks from both open-sourced library and HT generation platform to prove the feasibility and efficiency of the proposed HT feature extraction strategy. The detection results show high recall in nearly all tested benchmarks, achieving at most 97.7% recall on sequential Trojans and 84.8% on combinational ones.