Industrialised SPAD in 40 nm technology

Industrialised SPAD in 40 nm technology
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采用 40 nm 技术的工业化 SPAD

DOI:
10.1109/iedm.2017.8268404
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发表时间:
2017
期刊:
2017 IEEE International Electron Devices Meeting (IEDM)
影响因子:
--
通讯作者:
B. Mamdy
B. Mamdy
中科院分区:
--
文献类型:
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作者:
Sara Pellegrini;B. Rae;A. Pingault;D. Golanski;S. Jouan;C. Lapeyre;B. Mamdy

文献摘要

被引文献

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我们提出了第一个成熟的SPAD器件在先进的40纳米技术。我们还首次展示了集成在同一技术节点中的SPAD顶部的专用微透镜制造。报道了>70%的高填充因子以及室温下50cps的低DCR中值和840nm下5%的高PDP。通过利用小型数字节点,可以在像素内部集成更大量的逻辑,这可以移植到3D堆叠技术,其中逻辑在全数字专用层中实现[1]。
We present the first mature SPAD device in advanced 40 nm technology. For the first time we also show dedicated microlens fabrication on top of SPADs integrated in the same technology node. A high fill factor >70% is reported together with a low DCR median of 50cps at room temperature and a high PDP of 5% at 840nm. By taking advantage of the small digital node, a larger amount of logic can be integrated inside the pixel, which is ready to be ported to a 3D stacked technology, where the logic is implemented in a fully digital dedicated layer [1].