Reproducible operating margins on a 72 800-device digital superconducting chip
Reproducible operating margins on a 72 800-device digital superconducting chip
复制标题
72 800 台设备数字超导芯片上可重现的运营利润
DOI：
10.1088/0953-2048/28/12/124003
复制
发表时间：
2015
影响因子：
3.6
通讯作者：
A. Herr
中科院分区：
文献类型：
--
作者：
Q. Herr;J. Osborne;M. Stoutimore;H. Hearne;Ryan Selig;Jacob Vogel;E. Min;V. Talanov;A. Herr
我们报告的倒数量子逻辑移位寄存器的产量车辆的设计和测试组成的高达72 800约瑟夫森结器件每个模具，有史以来最大的数字超导电路报道。多种物理布局风格与麻省理工学院林肯实验室的代工厂相匹配，该代工厂支持四层和八层金属层的工艺，最小特征尺寸为0.5 μm。具有40 400个结的最大单个电路表明交流时钟幅度的±20%的大工作裕度。在一种情况下，数据可重复测量的准确性，±1%，在五个热循环中，仅使用被动高导磁合金磁屏蔽的基本预防措施和测试夹具中3 mK s−1的受控冷却速率。我们的结论是，适当的缓解技术，磁通捕获不再是一个限制性的考虑超大规模集成的超导体数字逻辑。
We report the design and test of reciprocal quantum logic shift-register yield vehicles consisting of up to 72 800 Josephson junction devices per die, the largest digital superconducting circuits ever reported. Multiple physical layout styles were matched to the MIT Lincoln Laboratory foundry, which supports processes with both four and eight metal layers and minimum feature size of 0.5 μm. The largest individual circuits with 40 400 junctions indicate large operating margins of ±20% on ac clock amplitude. In one case the data were reproducible to the accuracy of the measurement, ±1% across five thermal cycles using only the rudimentary precautions of passive mu-metal magnetic shielding and a controlled cool-down rate of 3 mK s−1 in the test fixture. We conclude that with proper mitigation techniques, flux-trapping is no longer a limiting consideration for very-large-scale-integration of superconductor digital logic.