Optimal TDMA time slot and cycle length allocation for hard real-time systems
Optimal TDMA time slot and cycle length allocation for hard real-time systems
复制标题
硬实时系统的最佳 TDMA 时隙和周期长度分配
DOI：
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发表时间：
2006
期刊：
影响因子：
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通讯作者：
L. Thiele
中科院分区：
文献类型：
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作者：
E. Wandeler;L. Thiele
我们提出了一种分析方法来确定必须在TDMA资源中分配的可证明的最小可能时隙长度，以服务于具有任意确定性时序行为的事件触发的硬实时负载。基于这种方法，我们提出了建设性的方法来找到TDMA资源中所有可行的以及最佳的周期长度，我们展示了如何确定TDMA资源的最小所需带宽。我们通过一个带有TDMA总线的大型分布式嵌入式系统的案例研究证明了所提出方法的适用性和计算效率，其中我们找到了TDMA总线的最佳参数集
We present an analytic method to determine the provably smallest possible slot length that must be allocated in a TDMA resource, to serve an event-triggered hard real-time load with arbitrary deterministic timing behavior. Based on this method, we then present constructive methods to find all feasible as well as the optimal cycle length in a TDMA resource, and we show how to determine the minimum required bandwidth of a TDMA resource. We demonstrate the applicability and computational efficiency of the presented methods in a case study of a large distributed embedded system with a TDMA bus, where we find the optimal parameter set for the TDMA bus