Ultrafast parallel reconfiguration of 3D-stacked reconfigurable spin logic chip with on-chip SPRAM (SPin-transfer torque RAM)
Ultrafast parallel reconfiguration of 3D-stacked reconfigurable spin logic chip with on-chip SPRAM (SPin-transfer torque RAM)
复制标题
具有片上 SPRAM（SPin 传输扭矩 RAM）的 3D 堆叠可重构自旋逻辑芯片的超快并行重构
DOI：
10.1109/vlsit.2012.6242515
复制
发表时间：
2012
期刊：
影响因子：
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通讯作者：
M. Koyanagi
中科院分区：
文献类型：
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作者：
T. Tanaka;H. Kino;R. Nakazawa;K. Kiyoyama;H. Ohno;M. Koyanagi
我们已经开发了新型的3D堆叠可重构自旋逻辑芯片，具有超快的片上SPRAM，以克服传统的可重构LSI的缺点。设计了两个可重构自旋逻辑芯片，并采用三维集成技术成功地实现了堆叠。从SPRAM单元的评估，最快的写入速度为5 ns的电路中获得。为了实现更高性能的可重构LSI，首次对堆叠式可重构自旋逻辑芯片进行了并行重构。超快片上SPRAM和3D堆叠结构将开启可重构LSI的新时代。
We have developed novel 3D-stacked reconfigurable spin logic chip having ultrafast on-chip SPRAM to overcome drawbacks of conventional reconfigurable LSIs. Two reconfigurable spin logic chips were carefully designed and successfully stacked using 3D integration technology. From the SPRAM cell evaluation, the fastest write speed of 5 ns was obtained in the circuits. To realize higher performance reconfigurable LSIs, parallel reconfiguration was fully demonstrated for the stacked reconfigurable spin logic chips for the first time. Both ultrafast on-chip SPRAM and 3D-stacked structure will open a new era of reconfigurable LSIs.