DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS

DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS
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DOI:
10.1109/jssc.1974.1050511
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发表时间:
1974-01-01
影响因子:
5.4
通讯作者:
LEBLANC, AR
LEBLANC, AR
中科院分区:
工程技术1区
文献类型:
--
作者:
DENNARD, RH;GAENSSLEN, FH;LEBLANC, AR

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本文认为,设计,制造和表征非常小的MOSFET开关器件,适合数字集成电路,使用1 /SPL亩/的顺序尺寸。缩放关系,显示如何传统的MOSFET可以减少尺寸。提出了一种改进的小型器件结构,其使用离子注入来提供浅源极和漏极区域以及不均匀的衬底掺杂分布。一维模型被用来预测衬底掺杂分布和相应的阈值电压与源极电压的特性。一个二维的电流传输模型被用来预测不同的设备参数组合的短沟道效应的相对程度。多晶硅栅MOSFET的沟道长度短至0.5 /spl μ/,和器件特性的测量和预测值进行了比较。预计在高度小型化的集成电路中使用这些非常小的器件的性能改进。
This paper considers the design, fabrication, and characterization of very small Mosfet switching devices suitable for digital integrated circuits, using dimensions of the order of 1 /spl mu/. Scaling relationships are presented which show how a conventional MOSFET can be reduced in size. An improved small device structure is presented that uses ion implantation, to provide shallow source and drain regions and a nonuniform substrate doping profile. One-dimensional models are used to predict the substrate doping profile and the corresponding threshold voltage versus source voltage characteristic. A two-dimensional current transport model is used to predict the relative degree of short-channel effects for different device parameter combinations. Polysilicon-gate MOSFET's with channel lengths as short as 0.5 /spl mu/ were fabricated, and the device characteristics measured and compared with predicted values. The performance improvement expected from using these very small devices in highly miniaturized integrated circuits is projected.