Silicon etch process options for micro- and nanotechnology using inductively coupled plasmas
Silicon etch process options for micro- and nanotechnology using inductively coupled plasmas
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DOI：
10.1016/j.mee.2006.01.079
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发表时间：
2006-04-01
影响因子：
2.3
通讯作者：
Mollenhauer, T
中科院分区：
文献类型：
--
作者：
Welch, CC;Goodyear, AL;Mollenhauer, T
硅是一种必不可少的材料在制造范围不断扩大的微和纳米尺度的光电和微电子器件。许多这类装置的制造都需要硅的图案，但直到最近，由于难以形成更小的特征和更高的纵横比，这项技术的开发一直受到限制。等离子蚀刻通过掩膜层是一个非常有用的手段，为精细尺寸的图案硅。在这项工作中，提出了几种使用电感耦合等离子体ICP进行微纳米级硅蚀刻的解决方案。(c) 2006 Elsevier B.V.版权所有
Silicon is an essential material in the fabrication of a continually expanding range of micro- and nano-scale opto-and microelectronic devices. The fabrication of many such devices requires patterning of the silicon but until recently exploitation of the technology has been restricted by the difficulty of forming the ever-smaller features and higher aspect ratios demanded. Plasma etching through a mask layer is a very useful means for fine-dimension patterning of silicon. In this work, several solutions are presented for the micro- and nano-scale etching of silicon using inductively coupled plasmas ICP. (c) 2006 Elsevier B.V. All rights reserved.