A Built-In Circuit for Self-reconfiguring Mesh-Connected Processor Arrays with Spares on Diagonal
A Built-In Circuit for Self-reconfiguring Mesh-Connected Processor Arrays with Spares on Diagonal
复制标题
DOI：
10.1007/978-3-662-59958-7_7
复制
发表时间：
2019
期刊：
影响因子：
--
通讯作者：
I. Takanami;Masaru Fukushi
中科院分区：
文献类型：
--
作者：
I. Takanami;Masaru Fukushi
本文提出了一种用于网状连接处理器阵列的内置自重构系统，其中有故障的处理元件由位于对角线上的备用处理元件进行补偿。首先，提出了一种用于重新配置具有故障处理元件的阵列的算法。通过仿真分析了系统的可靠性，并与一侧具有备用处理元件的阵列进行了比较。结果表明，在备件数量相同的情况下，前者明显高于后者。接下来，描述通过该算法实现自重构的逻辑电路。该电路控制处理元件的互连，并且其硬件开销非常小（即每个处理元件少于十个逻辑门）。所提出的系统对于每个处理元件相当可靠且少量备件足以保持高可靠性的情况是有效的。它还可以有效增强任务关键型系统中处理器阵列的运行时可靠性，在这些系统中，需要首先进行自我重新配置，而无需外部主机或手动维护操作。
This paper presents a built-in self-reconfiguring system for mesh-connected processor arrays where faulty processing elements are compensated for by spare processing elements located on the diagonal. First, an algorithm for reconfiguring the arrays with faulty processing elements is presented. The reliability of the system is analyzed by simulation and compared with that of arrays having spare processing elements on one side. The result shows that under the condition of the same number of spares, the former is fairly higher than the latter. Next, a logical circuit realizing self-reconfiguration by the algorithm is described. The circuit controls interconnections of processing elements and its hardware overhead is shown to be quite small (i.e. less than ten logic gates for each processing element). The proposed system is effective for the case where each processing element is fairly reliable and the small number of spares is sufficient for retaining a high reliability. It is also effective in enhancing the run-time reliability of a processor array in mission critical systems where first self-reconfiguration is required without an external host computer or manual maintenance operations.