Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs
Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs
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省略刷新：商品和宽 I/O DRAM 的案例研究
DOI：
10.1145/2818950.2818964
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发表时间：
2015
期刊：
影响因子：
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通讯作者：
N. Wehn
中科院分区：
文献类型：
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作者：
Matthias Jung;Éder F. Zulian;Deepak M. Mathew;M. Herrmann;Christian Brugger;C. Weis;N. Wehn
动态随机存取存储器 (DRAM) 对性能有很大影响，并且对从移动设备到服务器等系统的总功耗影响很大。未来高密度 DRAM 设备多达一半的功耗将由刷新命令引起。此外，刷新率不仅取决于设备容量，而且还很大程度上取决于温度。如果将 MPSoC 与宽 I/O DRAM 进行 3D 集成，功率密度和热耗散将显着提高。因此，在 3D-DRAM 中甚至需要更多的 DRAM 刷新操作。为了应对这些挑战，必须在硬件或软件层面上采用巧妙的 DRAM 刷新策略，使用新的或现有的基础设施和实现，例如部分阵列自刷新 (PASR) 或温度补偿自刷新 (TCSR)。在本文中，我们表明，对于专用应用程序，刷新可以完全禁用，而不会对应用程序性能产生影响或影响可以忽略不计。如果可以确保数据的生命周期短于当前所需的 DRAM 刷新周期，或者应用程序在给定时间窗口内能够在某种程度上容忍位错误，则这是可能的。
Dynamic Random Access Memories (DRAM) have a big impact on performance and contribute significantly to the total power consumption in systems ranging from mobile devices to servers. Up to half of the power consumption of future high density DRAM devices will be caused by refresh commands. Moreover, not only the refresh rate does depend on the device capacity, but it strongly depends on the temperature as well. In case of 3D integration of MPSoCs with Wide I/O DRAMs the power density and thermal dissipation are increased dramatically. Hence, in 3D-DRAM even more DRAM refresh operations are required. To master these challenges, clever DRAM refresh strategies are mandatory either on hardware or on software level using new or already available infrastructures and implementations, such as Partial Array Self Refresh (PASR) or Temperature Compensated Self Refresh (TCSR). In this paper, we show that for dedicated applications refresh can be disabled completely without or with negligible impact on the application performance. This is possible if it is assured that either the lifetime of the data is shorter than the currently required DRAM refresh period or if the application can tolerate bit errors to some degree in a given time window.