Fast simulation of VLSI interconnects
Fast simulation of VLSI interconnects
复制标题
VLSI互连的快速仿真
DOI：
10.1109/iccad.2004.1382549
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发表时间：
2004
期刊：
影响因子：
--
通讯作者：
V. Balakrishnan
中科院分区：
文献类型：
--
作者：
J. Jain;Cheng;V. Balakrishnan
本文介绍了一种高效、准确的互连仿真技术。提出了一种典型VLSI互连结构的新公式，该公式除了提供一组紧凑的建模方程外，还提供了在模拟级别利用稀疏性的潜力。仿真结果表明，与INDUCTWISE相比，我们的方法在计算时间和内存方面可以提高50/SPL倍(而INDUCTWISE的计算速度是SPICE的400/SPL倍/更快)，同时保持了模拟的准确性。
This work introduces an efficient and accurate interconnect simulation technique. A new formulation for typical VLSI interconnect structures is proposed which, in addition to providing a compact set of modeling equations, also offers a potential for exploiting sparsity at the simulation level. Simulations show that our approach can achieve 50 /spl times/ improvement in computation time and memory over INDUCTWISE (which in turn has been shown to be 400 /spl times/ faster than SPICE) while preserving simulation accuracy.