On broad-side delay test

On broad-side delay test
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DOI:
10.1109/vtest.1994.292299
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发表时间:
1994-04
期刊:
Proceedings of IEEE VLSI Test Symposium
影响因子:
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通讯作者:
J. Savir;S. Patil
J. Savir;S. Patil
中科院分区:
其他
文献类型:
--
作者:
J. Savir;S. Patil

文献摘要

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宽边延迟测试是基于扫描的延迟测试的一种形式,其中该对的第一个向量被扫描到链中,而该对的第二个向量是组合电路对该第一个向量的响应。这种延迟测试形式被称为“宽边”,因为延迟测试对的第二向量是以宽边方式(即通过逻辑)提供的。本文主要关注宽边延迟测试向量的生成;显示了在 ISCAS 顺序基准测试上进行的实验结果,并讨论了宽边延迟测试策略的一些问题。>
A broad-side delay test is a form of a scan-based delay test, where the first vector of the pair is scanned into the chain, and the second vector of the pair is the combinational circuit's response to this first vector. This delay test form is called "broad-side" since the second vector of the delay test pair is provided in a broad-side fashion, namely through the logic. This paper concentrates on generation of broad-side delay test vectors; shows the results of experiments conducted on the ISCAS sequential benchmarks, and discusses some concerns of the broad-side delay test strategy.>