High-Performance p-Channel LDMOS Transistors and Wide-Range Voltage Platform Technology Using Novel p-Channel Structure
High-Performance p-Channel LDMOS Transistors and Wide-Range Voltage Platform Technology Using Novel p-Channel Structure
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DOI：
10.1109/ted.2012.2228202
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发表时间：
2013-01-01
影响因子：
3.1
通讯作者：
Noguchi, Junji
中科院分区：
文献类型：
--
作者：
Shimamoto, Satoshi;Yanagida, Yohei;Noguchi, Junji
研究了高性能p沟道横向双扩散MOS（LDMOS）晶体管，该晶体管设计工作在35至200 V的宽电压范围内，并使用绝缘体上硅LDMOS平台技术构建。采用了一种新的沟道结构，使200 V p沟道LDMOS晶体管的饱和漏电流达到172 μ A/μ min，与n沟道LDMOS晶体管的饱和漏电流相当。获得了3470 m Ω.mm（2）的低导通电阻，同时保持了-240 V和-284 V的高导通和关断状态击穿电压。还通过优化布局，即，减小的表面场结构和场板。
High-performance p-channel lateral double-diffused MOS (LDMOS) transistors designed to operate in a wide voltage range from 35 to 200 V and built using silicon-on-insulator LDMOS platform technology were studied. A novel channel structure was applied, and consequently, a high saturation drain current of 172 mu A/mu min the 200-V p-channel LDMOS transistor was achieved, which is comparable to that of an n-channel LDMOS transistor. A low ON-resistance of 3470 m Omega.mm(2) was obtained while maintaining high ON- and OFF-state breakdown voltages of -240 and -284 V. The 35-200-V LDMOS transistors with low ON-resistance were also demonstrated by optimizing the layout, i.e., the reduced surface field structure and field plates.