Digital Compatible Synthesis, Placement and Implementation of Mixed-Signal Time-Domain Computing
Digital Compatible Synthesis, Placement and Implementation of Mixed-Signal Time-Domain Computing
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DOI：
10.1145/3316781.3317800
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发表时间：
2019-06
期刊：
影响因子：
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通讯作者：
Zhengyu Chen;H. Zhou;Jie Gu
中科院分区：
文献类型：
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作者：
Zhengyu Chen;H. Zhou;Jie Gu
混合信号时域计算（TC）由于其在机器学习加速器等应用中的效率很高，因此最近引起了极大的关注。但是，由于模拟和混合信号设计的性质，缺乏系统的合成以及时间域电路的位置和途径。本文提出了针对TC的全面设计流。在前端，提出了变异感知的数字兼容合成流。在后端，提出了一种使用基于图的优化引擎的放置技术来处理TC中特别严格的匹配要求。模拟结果显示出比先前的模拟放置方法的显着改善。 55nm的测试芯片用于证明所提出的设计流可以满足TC的严格计时匹配目标，并且比传统的数字设计相比，性能明显提高。
Mixed-signal time-domain computing (TC) has recently drawn significant attention due to its high efficiency in applications such as machine learning accelerators. However, due to the nature of analog and mixed-signal design, there is a lack of a systematic flow of synthesis and place & route for time-domain circuits. This paper proposed a comprehensive design flow for TC. In the front-end, a variation-aware digital compatible synthesis flow is proposed. In the back-end, a placement technique using graph-based optimization engine is proposed to deal with the especially stringent matching requirement in TC. Simulation results show significant improvement over the prior analog placement methods. A 55nm test chip is used to demonstrate that the proposed design flow can meet the stringent timing matching target for TC with significant performance boost over conventional digital design.