Sub-microwatt analog VLSI trainable pattern classifier
Sub-microwatt analog VLSI trainable pattern classifier
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DOI：
10.1109/jssc.2007.894803
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发表时间：
2007-05-01
影响因子：
5.4
通讯作者：
Cauwenberghs, Gert
中科院分区：
文献类型：
--
作者：
Chakrabartty, Shantanu;Cauwenberghs, Gert
设计并实现了一种亚微瓦级模拟系统芯片模板模式分类器，用于生物特征识别。一个可编程阵列的浮栅亚阈值MOS跨导线性电路匹配输入功能与存储的模板，并结合到类别输出的分数。通过电流模式反馈的输出的减法归一化产生被集成用于类别选择的置信度分数。分类器实现支持向量机以从训练样本中选择编程值。编程过程中的两步校准程序消除了模拟阵列中的失调和增益误差。一个24类，14输入，720模板分类器训练的扬声器识别和制造的3毫米x 3毫米芯片在0.5微米CMOS提供实时识别精度与浮点仿真软件。在每秒40个分类和840 nW功率下，处理器实现了每秒1.3 x 10（12）次乘法累加每瓦特功率的计算效率。
The design and implementation of an analog system-on-chip template-based pattern classifier for biometric signature verification at sub-microwatt power is presented. A programmable array of floating-gate subthreshold MOS translinear circuits matches input features with stored templates and combines the scores into category outputs. Subtractive normalization of the outputs by current-mode feedback produces confidence scores which are integrated for category selection. The classifier implements a support vector machine to select programming values from training samples. A two-step calibration procedure during programming alleviates offset and gain errors in the analog array. A 24-class, 14-input, 720-template classifier trained for speaker identification and fabricated on a 3 mm x 3 mm chip in 0.5 mu m CMOS delivers real-time recognition accuracy on par with floating-point emulation in software. At 40 classifications per second and 840 nW power, the processor attains a computational efficiency of 1.3 x 10(12) multiply-accumulates per second per Watt of power.