Multiplierless Unity-Gain SDF FFTs
Multiplierless Unity-Gain SDF FFTs
复制标题
无乘法器单位增益 SDF FFT
DOI：
10.1109/tvlsi.2016.2542583
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发表时间：
2016
影响因子：
2.8
通讯作者：
O. Gustafsson
中科院分区：
文献类型：
--
作者：
M. Garrido;Rikard Andersson;F. Qureshi;O. Gustafsson
在本文中，我们提出了一种新颖的方法来实现无乘法器单位增益单延迟反馈快速傅里叶变换（FFT）。以前的方法通过使用复数乘法器或带有附加缩放补偿的非单位增益旋转器来实现单位增益 FFT。相反，本简报提出了无需补偿电路的单位增益 FFT，即使使用非单位增益旋转器也是如此。这是通过旋转器的联合设计来实现的，以便整个 FFT 按 2 的幂缩放，然后转换为 1。这减少了FFT架构的硬件资源量，同时具有较高的计算精度。所提出的方法可以应用于任何 FFT 尺寸，并且提出了针对不同 FFT 尺寸的各种设计。
In this brief, we propose a novel approach to implement multiplierless unity-gain single-delay feedback fast Fourier transforms (FFTs). Previous methods achieve unity-gain FFTs by using either complex multipliers or nonunity-gain rotators with additional scaling compensation. Conversely, this brief proposes unity-gain FFTs without compensation circuits, even when using nonunity-gain rotators. This is achieved by a joint design of rotators, so that the entire FFT is scaled by a power of two, which is then shifted to unity. This reduces the amount of hardware resources of the FFT architecture, while having high accuracy in the calculations. The proposed approach can be applied to any FFT size, and various designs for different FFT sizes are presented.