Ideal static induction transistor implemented with molecular layer epitaxy
Ideal static induction transistor implemented with molecular layer epitaxy
复制标题
采用分子层外延实现的理想静电感应晶体管
DOI：
10.1016/0169-4332(94)90201-1
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发表时间：
1994
影响因子：
6.7
通讯作者：
J. Nishizawa
中科院分区：
文献类型：
--
作者：
P. Płotka;T. Kurabayashi;Y. Oyama;J. Nishizawa
将分子层外延技术应用于静电感应晶体管(SIT)的制备，其源-漏电距离从170？(冶金用90？)？到1000？沟道栅极在过度变化的SiNx掩模下以自对准的方式在异地刻蚀沟槽的侧壁上选择性地再生。SITS的特征揭示了侧壁上重新生长的晶体的性质与侧壁取向的依赖关系。栅极接口平行于<；011̄>；方向的晶体管为常闭状态，而栅极平行于<；011>；方向的晶体管为常开状态。
Molecular layer epitaxy (MLE) was applied for fabrication of static induction transistors (SIT) with electrical source-drain distances from 170 Å (metallurgical 90 Å) to 1000 Å. Channels-gates were regrown selectively under an overchanging SiNxmask in a self-alignment way on sidewalls of ex-situ etched grooves. Characteristics of the SITs reveal dependence of properties of the crystal regrown on a sidewall on the sidewall orientation. 170 Å (90 Å) transistors with gate interfaces parallel to the <011̄> direction are normally-off while the transistors with gates parallel to <011> are normally- on.