Architecting against Software Cache-Based Side-Channel Attacks
Architecting against Software Cache-Based Side-Channel Attacks
复制标题
针对基于软件缓存的侧通道攻击进行架构设计
DOI：
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复制
发表时间：
2013
影响因子：
3.7
通讯作者：
Huiyang Zhou
中科院分区：
文献类型：
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作者：
Jingfei Kong;O. Aciiçmez;Jean;Huiyang Zhou
使用包括数据高速缓存、指令高速缓存或分支目标缓冲器的类似高速缓存的架构组件作为侧信道，基于软件高速缓存的侧信道攻击能够通过合法软件活动来导出在密码操作中使用的秘密密钥。现有的软件解决方案通常是特定于应用程序的，并且会产生大量的性能开销。最近针对数据缓存攻击的硬件提案，虽然有效地降低了性能开销，但仍然容易受到高级攻击。此外，缺少针对对其他高速缓存结构（包括指令高速缓存和分支目标缓冲器）的攻击的有效防御。在本文中，我们提出了硬件和软件集成的方法来抵御基于软件缓存的攻击。对于数据缓存的攻击，我们建议使用预加载，通知负载，并通知负载与软件随机置换，以确保分区锁定缓存（PLcache），随机置换（RPcache）和常规缓存，分别。这些方法在硬件复杂性和性能开销之间提出了不同的折衷。为了抵御指令缓存的攻击，我们表明，PLcache预加载和RPcache提供良好的保护。为了防御基于分支目标缓冲区的攻击，我们提出了一种新的更新策略，以消除潜在的信息泄漏。实验结果表明，所提出的方案不仅提供了强大的安全保护，但也引起小的性能开销。
Using cache-like architectural components including data caches, instruction caches, or branch target buffers as a side channel, software cache-based side-channel attacks are able to derive secret keys used in cryptographic operations through legitimate software activities. Existing software solutions are typically application specific and incur substantial performance overhead. Recent hardware proposals against attacks on data caches, although effective in reducing performance overhead, may still be vulnerable to advanced attacks. Furthermore, efficient defenses against attacks on other cache structures, including instruction caches and branch target buffers, are missing. In this paper, we propose hardware-software integrated approaches to defend against software cache-based attacks comprehensively. For attacks on data caches, we propose to use preloading, informing loads, and informing loads with software random permutation to secure the partition-locked cache (PLcache), the random permutation (RPcache) and regular caches, respectively. These approaches present different tradeoffs between hardware complexity and performance overhead. To defend against attacks on instruction caches, we show that the PLcache with preloading and the RPcache provide good protection. To defend against attacks based on branch target buffers, we propose to adopt a new update policy to eliminate potential information leaking. Our experiments show that the proposed schemes not only provide strong security protection but also incur small performance overhead.