OpenCL for HPC with FPGAs: Case study in molecular electrostatics
OpenCL for HPC with FPGAs: Case study in molecular electrostatics
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OpenCL for HPC with FPGA：分子静电学案例研究
DOI：
10.1109/hpec.2017.8091078
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发表时间：
2017
期刊：
影响因子：
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通讯作者：
M. Herbordt
中科院分区：
文献类型：
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作者：
Chen Yang;Jiayi Sheng;Rushi Patel;A. Sanaullah;Vipin Sachdeva;M. Herbordt
FPGA已成为云和集群中具有成本效益的加速器替代方案。然而，可编程性仍然是一个挑战，OpenCL通常被认为是解决方案的一个可能部分。在这项工作中，我们寻求以两种方式推进OpenCL在FPGA上的HPC使用。第一个是通过检查核心HPC应用程序，分子动力学。第二个是通过检查一个基本的设计模式，我们认为还没有被描述为OpenCL：从一组生产者数据路径传递数据到一组消费者数据路径，特别是在生产者产生数据不均匀。我们评估几种设计：Verilog和OpenCL中的单级版本，具有优化仲裁器的两级Verilog版本，以及具有不同仲裁和握手机制的几个两级OpenCL版本，包括具有嵌入式Verilog模块的版本。对于Verilog设计，我们发现FPGA保持了其高效率，与单核相比性能优势为50倍至80倍。我们还发现，OpenCL可能与HDL的直线版本的代码竞争，但对于更复杂的仲裁和握手的设计，相对性能大大降低。
FPGAs have emerged as a cost-effective accelerator alternative in clouds and clusters. Programmability remains a challenge, however, with OpenCL being generally recognized as a likely part of the solution. In this work we seek to advance the use of OpenCL for HPC on FPGAs in two ways. The first is by examining a core HPC application, Molecular Dynamics. The second is by examining a fundamental design pattern that we believe has not yet been described for OpenCL: passing data from a set of producer datapaths to a set of consumer datapaths, in particular, where the producers generate data non-uniformly. We evaluate several designs: single level versions in Verilog and in OpenCL, a two-level Verilog version with optimized arbiter, and several two-level OpenCL versions with different arbitration and hand-shaking mechanisms, including one with an embedded Verilog module. For the Verilog designs, we find that FPGAs retain their high-efficiency with a factor of 50 χ to 80 χ performance benefit over a single core. We also find that OpenCL may be competitive with HDLs for the straightline versions of the code, but that for designs with more complex arbitration and hand-shaking, relative performance is substantially diminished.