A Data Flow Multiprocessor
A Data Flow Multiprocessor
复制标题
数据流多处理器
DOI：
10.1109/tc.1977.5009292
复制
发表时间：
1977
影响因子：
3.7
通讯作者：
J. Rumbaugh
中科院分区：
文献类型：
--
作者：
J. Rumbaugh
本文提出了一个高度并发的多处理器的体系结构，该多处理器运行以数据流表示法表示的程序。数据流指令执行的顺序仅取决于指令所需操作数的可用性。由于数据流指令没有副作用，因此如果每个指令都有其所需的操作数，那么不相关的指令可以同时执行而不会相互干扰。数据流多处理器被分层构造为简单模块的网络。所有模块交互都是异步的。该机器的主要工作元件是一组激活处理器，每个激活处理器执行对处理器内的本地存储器中保存的数据流过程的一次调用。每个处理器内的逻辑单元流水线执行多个同时活动的指令。除了过程调用（导致在其他处理器中创建新的激活）以及对大型数据结构的操作（由结构控制器模块使用存储在中央存储器中的值来执行）之外，所有数据流操作都在单个处理器内执行。数据流过程中的并发性为处理器在处理缓慢的操作时提供了一些事情可做。机器的行为已由正式的描述语言指定，并且已被证明可以正确实现数据流语言。与传统设计相比，数据流多处理器的主要优点是降低了处理器-内存连接的复杂性、更多地使用流水线以及更简单地表示和实现并发活动。
This paper presents the architecture of a highly concurrent multiprocessor which runs programs expressed in data flow notation. Sequencing of data flow instruction execution depends only on the availability of operands required by instructions. Because data flow instructions have no side effects, unrelated instructions can be executed concurrently without interference if each has its required operands. The data flow multiprocessor is hierarchically constructed as a network of simple modules. All module interactions are asynchronous. The principal working elements of the machine are a set of activation processors, each of which performs the execution of one invocation of a data flow procedure held in a local memory within the processor. A pipeline of logical units within each processor executes several concurrently active instructions. All data flow operations are performed within single processors except procedure calls, which cause the creation of new activations in other processors, and operations on large data structures, which are performed by structure controller modules using values stored in a central memory. Concurrency within a data flow procedure provides a processor with something to do while a slow operation is being processed. The behavior of the machine has been specified by a formal description language and has been shown to correctly implement the data flow language. The principal advantages of the data flow multiprocessor over conventional designs are reduced complexity of the processor-memory connection, greater use of pipelining, and a simpler representation and implementation of concurrent activity.