A High-speed Low-power Deep Neural Network on an FPGA based on the Nested RNS: Applied to an Object Detector
A High-speed Low-power Deep Neural Network on an FPGA based on the Nested RNS: Applied to an Object Detector
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DOI：
10.1109/iscas.2018.8351850
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发表时间：
2018-05
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通讯作者：
Hiroki Nakahara;Tsutomu Sasao
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作者：
Hiroki Nakahara;Tsutomu Sasao
预训练的卷积深度神经网络（CNN）是前馈计算的视角，广泛用于嵌入式视觉系统。CNN的应用之一是帧对象检测问题。它广泛应用于嵌入式系统，如机器人，汽车，安全摄像头和无人机，这些系统需要高性能功率效率的设备。在CNN中，2D卷积运算占用90多个时间。由于2D卷积运算执行大量的乘-累加（MAC）运算，因此传统的实现无法实现完全并行的CNN。RNS通过模集合的剩余将整数分解为整数元组。由于没有一对模与任何其他模具有公因子，因此常规RNS将MAC单元分解为具有不同大小的电路，这意味着RNS不能利用具有统一大小的FPGA的资源。在本文中，我们使用嵌套RNS（NRNS），递归分解的RNS。它可以将MAC单元分解成较小的电路。在使用NRNS的CNN中，MAC单元被分解为通过FPGA的查找表实现的4位单元。因此，它以较少的硬件实现高时钟频率。我们设计了Tiny YOLOv 2用于实际的目标检测，并在Digilent NetFPGA-SUME FPGA板上实现了基于NRNS的CNN。与NVidia GTX1080Ti（Pascal架构）相比，采用NRNS的FPGA在性能-功耗效率方面是GPU的3.19倍。
A pre-trained convolutional deep neural network (CNN) is the feed-forward computation perspective, and it is widely used for the embedded vision systems. One of the applications of the CNN is a frame object detection problem. It is widely used in the embedded systems, such as a robot, an automobile, a security camera, and a drone, that require a highly performance-power efficient device. In the CNN, the 2D convolutional operation occupies more than 90time. Since the 2D convolutional operation performs massive multiply-accumulation (MAC) operations, conventional realizations could not implement a fully parallel CNN. The RNS decomposes an integer into a tuple of integers by residues of moduli set. Since no pair of modulus has a common factor with any other, the conventional RNS decomposes the MAC unit into circuits with different sizes means that the RNS could not utilize resources of an FPGA with uniform size. In this paper, we use the nested RNS (NRNS), which recursively decompose the RNS. It can decompose the MAC unit into circuits with small sizes. In the CNN using the NRNS, a MAC unit is decomposed into 4-bit ones realized by look-up tables of the FPGA. Thus, it leads to a high clock frequency with less hardware. We designed the Tiny YOLOv2 for the practical object detection, and it using the CNN based on the NRNS is implemented on a Digilent NetFPGA-SUME FPGA board. Compared with the NVidia GTX1080Ti (Pascal architecture) for the designed Tiny YOLOv2, the FPGA using the NRNS was 3.19 times better than the GPU as for the performance-power efficiency.