Characterization of the electrostatic discharge induced interface traps in metal-oxide-semiconductor field-effect transistors
Characterization of the electrostatic discharge induced interface traps in metal-oxide-semiconductor field-effect transistors
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DOI：
10.1109/irps.2009.5173348
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发表时间：
2009-04
期刊：
影响因子：
--
通讯作者：
J. Tseng;J. Hwu
中科院分区：
文献类型：
--
作者：
J. Tseng;J. Hwu
采用传输线脉冲技术和电荷泵浦方法研究了静电放电电流脉冲引起的二氧化硅界面陷阱特性。据观察，静电放电应力在击穿之前引起的界面陷阱数量要少得多，并且界面陷阱沿沟道方向的分布比直流应力更加不均匀和局部化。提出了界面陷阱产生和形成的可能机制。
The interface trap's characteristics in silicon dioxide induced by electrostatic discharge current impulse were studied using the transmission line pulsing technique and charge pumping method. It was observed that the electrostatic discharge stress induces far less amount of interface traps prior to breakdown and the interface traps distribution along the channel direction is more non-uniform and localized than dc stress. The possible mechanisms for interface trap generation and formation are suggested.